View BD4153EFV_4836300.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. power management switch ics for pcs and digital consumer products power switch ics for expresscard tm bd4153fv,BD4153EFV description bd4153fv/efv is a power management switch ic for the next generation pc card (expresscard tm ) that pcmcia recommends. conforms to pcmcia?s expresscard tm standard, expresscard tm compliance checklist, and expresscard tm implementation guideline, and obtains the world first compliance id ?ec100001? from pcmcia. offers various functions such as adjustable soft-starter, overcurrent detector (oc function), card detector, and system condition detector, which are ideally suited for laptop and desktop computers. features 1) incorporates three low on-resistance fets for expresscard tm . 2) incorporates an fet for output discharge. 3) incorporates an enabler. 4) i incorporates an undervoltage lockout (uvlo) 5) i employs ssop-b24 package. 6) i employs htssop-b24 package. 7) incorporates a thermal shutdown protector (tsd). 8) incorporates a soft-starter. 9) incorporates an overcurrent protector (ocp). 10) incorporates an overcurrent flag output (oc). 11) conforms to expresscard tm standard. 12) conforms to expresscard tm compliance checklist. 13) conforms to expresscard tm implementation guideline. use laptop and desktop computers, and other digital devices equipped with expresscard. lineup parameter bd4153fv BD4153EFV package ssop-b24 htssop-b24 ?expresscard tm ? is a trademark registered by pcmcia(personal co mputer memory card international association). absolute maximum ratings bd4153fv/BD4153EFV parameter symbol bd4153fv BD4153EFV unit power supply voltage vcc 5.0 * 1 5.0 * 1 v logic input voltage en,cppe#,cpusb#,sysr,perst_in# 5.0 * 1 5.0 * 1 v logic output voltage 1 oc 5.0 * 1 5.0 * 1 v logic output voltage 2 perst# vcc * 1 vcc * 1 v input voltage 1 v3_in, v15_in 5.0 * 1 5.0 * 1 v input voltage 2 v3aux_in vcc * 1 vcc * 1 v output voltage v3,v3aux,v15 5.0 * 1 5.0 * 1 v output current 1 iov3, iov15 2.0 2.0 a output current 2 iov3aux 1.0 1.0 a power dissipation 1 pd1 787 * 2 - mw power dissipation 2 pd2 1025 * 3 1100 * 4 mw operating temperature range topr -40 +100 -40 +100 storage temperature range tstg -55 +150 -55 +150 maximum junction temperature tjmax +150 +150 *1 however, not exceeding pd. *2 pd derating at 6.3mw/ for temperature above ta=25 *3 in the case of ta 25c (when mounting to 70mmx70mmx1.6mm glass ep oxy substrate), derated at 8.2 mw/c. *4 in the case of ta 25c (when mounting to 70mmx70mmx1.6mm glass ep oxy substrate), derated at 8.8 mw/c. no.10029ebt08
bd4153fv,BD4153EFV technical note 2/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. recommended operating conditions bd4153fv/BD4153EFV parameter symbol min max unit power supply voltage vcc 3.0 3.6 v logic input voltage 1 en -0.2 3.6 v logic input voltage 2 cppe#,cpusb#,sysr,perst_in# -0.2 vcc v logic output voltage 1 oc - 3.6 v logic output voltage 2 perst# - vcc v input voltage 1 v3_in 3.0 3.6 v input voltage 2 v3aux_in 3.0 vcc v input voltage 3 v15_in 1.35 1.65 v soft start setup capacitor 1 css_v3, css_v15 0.001 1.0 f soft start setup capacitor 2 css_v3aux 0.001 0.1 f * this product is designed for protection against radioactive rays. electrical characteristics (unless otherwise noted, ta = 2 5 vcc=3.3v ven=3.3v v3_in= v3aux_in=3.3v, v15_in=1.5v) parameter symbol standard value unit condition min typ max standby current ist - 35 70 a ven=0v bias current 1 icc1 - 0.25 0.50 ma vsysr=0v bias current 2 icc2 - 1.0 2.0 ma vsysr=3.3v [enable] high level enable input voltage venhi 2.3 - 5.5 v low level enable input voltage venlow -0.2 - 0.8 v enable pin input current ien - 3 10 a ven=3v [logic (cppe#,cpusb#)] high level logic input voltage vlhi 2.3 - vcc v low level logic input voltage vllow -0.2 - 0.8 v logic pin input current il -1 0 1 a v cppe# =3.3v or v cpusb# =3.3v [logic (sysr)] high level logic input voltage vsysrhi 2.3 - vcc v low level logic input voltage vsysrlow -0.2 - 0.8 v logic pin input current isysr 6 11 18 a v sysr =3.3v [logic (perst_in#)] high level logic input voltage vpsthi 2.3 - vcc v low level logic input voltage vpstlow -0.2 - 0.8 v logic pin input current ipst -18 -11 -6 a v perst_in# =0v
bd4153fv,BD4153EFV technical note 3/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. electrical characteristics ? continued (unless otherwise noted, ta = 2 5 vcc=3.3v ven=3.3v v3_in= v3aux_in=3.3v, v15_in=1.5v) parameter symbol standard value unit condition min typ max [switch v3] on resistance r v3 - 35 73 m ? tj=-10 100 * discharge on resistance r v3 dis - 60 150 ? [switch v3aux] on resistance r v3aux - 100 210 m ? tj=-10 100 * discharge on resistance r v3aux dis - 60 150 ? [switch v15] on resistance r v15 - 42 85 m ? tj=-10 100 * discharge on resistance r v15 dis - 60 150 ? [soft start] charge current ichr 1.0 2.0 3.0 a ss_v3 high voltage ss_v3hi gh v3+4 v3+5 v3+6 v ss_v15 high voltage ss_v15high v15+4 v15+5 v15+6 v ss_v3aux high voltage ss_auxhigh 1.5 1.8 2.1 v discharge current idis 0.3 1.0 - ma vss=1v low voltage sslow - - 50 mv [over current protection] oc flag v3 ocpv3_s 1.0 - - a v3 over current ocpv3 2.0 - - a oc flag v3aux ocpv3aux_s 0.25 - - a v3aux over current ocpv3aux 0.50 - - a oc flag v15 ocpv15_s 0.50 - - a v15 over current ocpv15 1.20 - - a oc_delay charge current i ocp_delaych 1.0 2.0 3.0 a oc_delay discharge current i ocp_delaydis 1.0 2.0 - ma voc_delay=1v oc_delay standby voltage vocp_delayst - - 50 mv oc_delay threshold voltage vocp_delayth 0.6 0.7 0.8 v oc low voltage vocp - 0.1 0.2 v ioc=0.5ma oc leak current iocp - - 1 a voc=3.65v [under voltage lockout] v3_in uvlo off voltage vuvlov3_i n 2.80 2.90 3.00 v sweep up v3_in hysteresis voltage S vuvlov3_in 80 160 240 mv sweep down v3aux_in uvlo off voltage vuvlov3aux_in 2.80 2.90 3.00 v sweep up v3aux_in hysteresis voltage S vuvlov3aux_in 80 160 240 mv sweep down v15 uvlo off voltage vuvlov15 1.25 1.30 1.35 v sweep up v15 hysteresis voltage S vuvlo15 50 100 150 mv sweep down vcc uvlo off voltage vuvlovcc 2.80 2.90 3.00 v sweep up vcc hysteresis voltage S vuvlovcc 80 160 240 mv sweep down * design guarantee
bd4153fv,BD4153EFV technical note 4/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. reference data fig.7 v3 risetime fig.8 v3 rise propagation delay time fig.12 v3aux rise time 1.00e-06 v3 risetime c ss_v3 (f) rise time (ms) 0.01 0.1 1 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 v3aux v3 cp# sysr v3aux v3 cp# sysr v3aux v3 cp# sysr v3aux v3 sysr cp# perst# v3 ss_v3 logic input(sysr) perst# v3 ss_v3 logic input(cp#) perst# v3 ss_v3 logic input(en) fig. system stand-by ?active (no card) fig.4 pci card assert/deassert (stand-by) fig.5 card assert/deassert (active) fig.1 system stand-by active (card) fig.2 system active ? stand-by (card) fig.9 v3 start up (stand-by active) fig.11 v3 wave form (shut down active) fig.10 v3 start up (card assert) cpusb# v3 v3aux perst# fig.6 usb card assert/ deassert (active) v3aux v3 cp# sysr 1.00e-06 v3 rise propagation delay time delay time (ms) c ss_v3 (f) 0.01 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1 0.1 v3aux rise time () delay time (ms) c ss_v3aux (f) 0.01 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1 0.1
bd4153fv,BD4153EFV technical note 5/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. fig.13 v3aux rise propagation delay fig.17 v15 rise time fig.18 v15 rise propagation delay time perst# v3aux ss_v3aux logic input(sysr) perst# v3aux ss_v3aux logic input(cp#) perst# v3aux ss_v3aux logic input(en) perst# v15 ss_v15 logic input(sysr) perst# v15 ss_v15 logic input(cp#) perst# v15 ss_v15 logic input(en) ishort(500ma/div) ocp_delay ocp_flag v3aux perst# perst#_delay sysr fig.14 v3aux start up (stand-by active) fig.15 v3aux start up (card assert) fig.16 v3aux start up (shut down active) fig.19 v15 start up (stand-by active) fig.20 v15 start up (card assert) fig.21 v15 start up (shut down active) fig.24 perst# h l wave form fig.23 perst# l h wave form fig.22 v3aux short circuit perst# perst#_delay sysr v3aux rise propa g ation dela y delay time (ms) c ss_v3aux (f) 0.01 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1 0.1 v15 rise time delay time (ms) c ss_v15 (f) 0.01 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1 0.1 v15 rise propagation delay time 1 delay time (ms) c ss_v15 (f) 0.01 10 100 1000 10000 1.00e-10 1.00e-09 1.00e-08 1.00e-07 1 0.1
bd4153fv,BD4153EFV technical note 6/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. block diagram 1.5v/625ma 3.3v aux/275ma oc_delay v3_in1 sysr v3 _ in v3aux_in uvlo cppe# cpusb# vcc ss_v3 v15_in1 v15-2 input logic reference block v3aux_in ss_v3aux ss_v15 v15_in under voltage lock out vd v3_in,v3aux_in,v15 v3,v3aux,v15 3.3v/1.30a gnd pump char g e protection thermal tsd en vcc vd vd v3-2 v3aux perst# v3aux_in 3.3v tsd,cl,uvlo v3-1 power good tsd,cl,uvlo tsd,cl,uvlo_aux perst#_delay cl oc v3_in2 v15_in2 v15-1 perst_in# en,sysr,cpusb#,cppe# 1.5v uvlo_aux 3.3v vcc 21 22 2 20 6 17 18 11 12 10 16 24 23 14 15 13 7 19 9 8 5 4 3 1
bd4153fv,BD4153EFV technical note 7/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. pin configration pin function pin no pin name pin function 1 gnd gnd pin 2 ss_v3 v3 soft start pin 3 v3_1 v3 output pin 1 4 v3_2 v3 output pin 2 5 v3aux v3aux output pin 6 ss_v3aux v3aux soft start pin 7 perst_in# perst# control input pin (sysreset#) 8 v15_1 v15 output pin 1 9 v15_2 v15 output pin 2 10 sysr logic input pin 11 cppe# logic input pin 12 cpusb# logic input pin 13 perst#_delay perst# delay time setting pin 14 oc_delay ocp delay time setting pin 15 oc over current protect signal output pin 16 ss_v15 v15 soft start pin 17 v15_in1 v15 input pin 1 18 v15_in2 v15 input pin 2 19 perst# logic output pin 20 v3aux_in v3aux input pin 1 21 v3_in1 v3 input pin 1 22 v3_in2 v3 input pin 2 23 en enable input pin 24 vcc input voltage gnd ss_v3 v3_1 v3_2 v3au x ss_v3au x perst_in # v15_1 v15_2 sysr cppe# cpusb# perst#_delay oc_delay oc ss_v15 v15_in1 v15_in2 perst# v3aux_in v3_in1 v3_in2 en vcc (sysreset#) 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 ssop-b24 package
bd4153fv,BD4153EFV technical note 8/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. description of operations vcc bd4153fv/efv has an independent power input pin for an internal circuit operation in order to activate uvlo, input logic, and charge pump, the maximum current through which is rated to 2 ma. it is recommended to connect a bypass capacitor of 0.1 f or so to vcc pin. en with an input of 2.3 volts or higher, this te rminal turns to ?high? level to activate the circuit, while it turns to ?low? leve l to deactivate the circuit (with the standby circuit current of 35 a), discharges each output and lowers output voltage if the input is lowered to 0.8 volts or less. v3_in, v15_in, and v3aux_in these are the input terminals for each channel of a 3ch switch. v3 _ in and v15 _ in terminals have two pins each, which should be short-circuited on the pc board with a thick conduc tor. and v3aux in terminal sh ould be short-circuited to vcc terminal. through these three terminals, a big current runs (v3 _ in: 1.35a, v3aux _ in: 0.275 a, and v15 _ in: 0.625 a). in order to lower the output impedance of the power supply to be co nnected, it is recommended to provide ceramic capacitors (of b-characteristics or better) between these terminals and ground; 1 f or so between v3 _ in and gnd and between v15 _ in and gnd, and 0.1 f or so between v3aux _ in and gnd. v3, v15, and v3aux these are the output terminals for each switch. v3 and v15 termi nals have two pins each, which should be short-circuited on the pc board and connected to an expresscard connector with a thick conductor as shortest as possible. in order to stabilize the output, it is recommended to provide ceramic capaci tors (of b-characteristics or better) between these terminals and ground; 10 f or so between v3 and gnd and between v15 and gnd, and 1 f or so between v3aux and gnd. cppe# the pin used to find whether a pci-express signal compatible card is provided or not. turns to ?high? level with an input of 2.3 volts or higher, which means that no card is provided, while it turns to ?low? level when the input is lowered to 0.8 volts or less, which means that a card is provided. controls turning on/off of the switch according to the status of the system. cpusb# the pin used to find whether a usb2.0 signal compatible card is provided or not. turns to ?high? level with an input of 2.3 volts or higher, which means that no card is provided, while it turns to ?low? level when the input is lowered to 0.8 volts or less, which means that a card is provided. controls turn ing on/off of the switch according to the system status. sysr the pin used to detect the system status. turns to ?high? leve l with an input of 2.3 volts or higher, which means that the system is activated, while it turns to ?low? level when the inpu t is lowered to 0.8 volts or less, which means that the system is on standby. perst_in# the pin used to control a reset signal to a card (perst#) fr om the system side. (also referred to as ?sysreset#? by pcmcia.) turns to ?high? level with an input of 2.3 volts or higher, and turns perst# to ?high? level and with a ?power good? output. turns to ?low? level and turns perst# to ?low? level when the input is lowered to 0.8 volts or less. perst# the pin used to provide a reset signal to a pci-express co mpatible card. the status is determined by each output, perst#_in, cppe# system status, and en on/off status. turns to ?high? level and activates the pci-express compatible card only if each output is within the ?power good? threshold with the card kept inserted and with perst_in# turned to ?high? level. perst#_delay dela y during which the level at perst# pin turns from low to high may be set with a capacitor externally applied. the delay time is determined by the regulated current (2 a), the reference voltage (0.7 volts) inside the ic and the capacitance of the capacitor externally applied. the delay time is spec ified as ?at least 1 ms? in ?expresscard standard?. it does not synchronize with perst_in#, and it synchronizes only with a ?power good? output inside the ic. turns to ?low? level when sw is turned off. oc turns its output to ?low? level if an overcurrent condition is detected. this open drain output may be pulled up to 3.6 volts power supply via resistor. oc-delay delay during which the level at oc pin turns from high to low may be set with a capacitor externally applied. the delay time is determined by the regulated current (2 a), the reference voltage (0.7 volts) inside the ic and the capacitance of the capacitor externally applied. may be used to control with the oc status fed back to the system . if fed back to en terminal of this ic, it may be used to turn off the output that is provided when an overcurrent condition is detected.
bd4153fv,BD4153EFV technical note 9/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. timing chart power on/off status of expresscard tm system status expresscard tm module status power switch status primary auxiliary primary auxiliary(3.3v aux) off off don?t care off off on on de-asserted off off asserted on on on on de-asserted off off asserted before this system status off on asserted after this system status off off system status card status stand-by status :sysr=l cardasserted status :cp#=l on status :sysr=h card de-asserted status :cp#=h from on to stand-by status :sysr=h l from de-asserted to asserted status :cp#=h l from stand-by to on status :sysr=l h from asserted to de-asserted status :cp#=lh expresscard tm states transition diagram v3aux=off v15=v3=off sysr=h ?l cp#=h cp#=h ?l ? sysr= cp#= sysr=h l sysr=l cp#=l sysr=l cp#=h sysr=h cp#=l sysr=h cp#=l sysr=l h cp#=h l sysr=h cp#=l sysr=h l cp#=l sysr=l cp#= v3aux=on v15=v3=on v3aux=on v15=v3=off
bd4153fv,BD4153EFV technical note 10/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. bd4153fv evaluation board circuit bd4153fv evaluation board application components part no value company parts name part no value company parts name u1 - rohm bd4153fv c6a - - - r7 10k ? rohm mcr03series c7 - - - r10 10k ? rohm mcr03series c8 10 f murata grm21 series r10a 0 ? rohm mcr03series c10 - - - r11 120k ? rohm mcr03series c11 - - - r11a 0 ? rohm mcr03series c12 - - - r12 120k ? rohm mcr03series c13 0.033 f murata grm18 series r12a 0 ? rohm mcr03series c14 0.22 f murata grm21 series r15 10k ? rohm mcr03series c16 2200pf murata grm18 series r18 - - c17 1 f murata grm21 series r20 0 ? rohm mcr03series c20 0.1 f murata grm18 series r23 0 ? rohm mcr03series c21 1 f murata grm21 series r24 10 ? rohm mcr03series c23 0.1 f murata grm18 series c2 2200pf murata grm18 series c23a - - - c3 10 f murata grm21 series c24 0.1 f murata grm18 series c5 1 f murata grm21 series c6 0.01 f murata grm18 series bd4153fv v3_in2 gnd v3aux v3_1 ss_v3 en vcac ss _ v3aux v3_2 perst_in# v15_1 v15 _ 2 sysr cppe# cpusb# v3 in1 v3_auxin perst # v15 in2 v15 in1 ss_v15 oc oc delay perst#_dela y 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 vcc vcc vcc tp16 tp15 c2 c3 tp17 tp2 c5 c6a c6 v3_auxin r7 r7a s2 tp4 c7 c8 tp18 tp3 s4 s5 s6 r10 r12 r11 r10a r12a r11a c10 c12 c11 tp6 tp7 tp8 tp1 tp21 c24 c23a c21 tp13 r24 r23 s1 c23 r20 c20 c17 c16 c14 c13 tp11 vcc tp14 tp20 tp12 tp22 tp19 tp9 r15 r18 tp10 u1
bd4153fv,BD4153EFV technical note 11/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. bd4153fv evaluation board layout silk screen top layer bottom layer mid layer 1 mid layer 2
bd4153fv,BD4153EFV technical note 12/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. apprication circuit (circuit for expresscard tm compliance checklist) about heat loss in designing heat, operate the apparatus within the following conditions. (because the following temperatures are warranted temperat ure, be sure to take marg in, etc. into account.) 1. ambient temperature ta shall be not more than 125c. 2. chip junction temperature tj shall be not more than 150c. chip junction temperature tj can be cons idered under the following two cases. chip junction temperature tj is found from ic surface te mperature tc under actual ap plication conditions:tj=tc+ j-cw reference value j-c:ssop-b24 33 /w htssop-b24 36 /w chip junction temperature tj is f ound from ambient temperature ta:tj=tc+ j-aw reference value j-a:ssop-b24 243.9 /w 147.1 /w j-a:htssop-b24 113.6 /w 73.5 /w 44.6 /w 31.3 /w (ic only) single-layer substrate (substrate surface copper foil area: less 3%) single-layer substrate (substrate surface copper foil area: less 3%) double-layer substrate (substrate surface copper foil area:1515mm 2 ) double-layer substrate (substrate surface copper foil area: 7070mm 2 ) fourth-layer substrate (substrate surface copper foil area: 7070mm 2 ) most of heat loss in bd4153fv occurs at the output switch. the power lost is det ermined by multiplying the on-resistance by the square of output current of each switch. as BD4153EFV employs the power pkg, the thermal derating characteristics significantly depends on t he pc board conditions. when designing, ca re must be taken to the size of a pc board to be used. cppe#(11pin) cpusb#(12pin) v3(3,4pin) v3aux(5pin) v15(8,9pin) perst#(19pin) oc(15pin) vcc(24pin) v3_in(21,22pin) v3aux_in(20pin) v15_in(17,18pin) perst_in#(7pin) en(23pin) sysr(10pin) cppe#(1) cpusb#(2) 3.3v(3) 3.3vaux(4) 1.5v(5) perst#(6) 3.3v(7) 3.3vaux(8) 1.5v(9) sysreset#(10) bd4153fv vcc gnd(1pin) oc_delay(14pin) perst#_delay(13pin) ss_v3aux(6pin) ss_v15(16pin) ss_v3(2pin)
bd4153fv,BD4153EFV technical note 13/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. equivalent circuit 2pin 3,4pin 5pin 6pin 7pin 8,9pin< v15_1,v15_2> 10pin 11pin 12pin 13pin 14pin 15pin 16pin 17,18pin 19pin 20pin 21,22pin 23pin 24pin vd v3_in v3_in ss_v3 v3aux_in ss_v3aux v3aux_in vcc vcc vcc v15_in v15_in ss_v15 vcc v3aux vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc vcc v3aux v15 v3
bd4153fv,BD4153EFV technical note 14/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. note for use 1.absolute maximum ratings for the present product, thoroughgoing qua lity control is carried out, but in t he event that applied voltage, working temperature range, and other absolute maximum rating are exceeded, the pr esent product may be destroyed. because it is unable to identify the short mode, open mode, etc., if any special mode is assumed, which exceeds the absolute maximum rating, physical safety measures are requested to be taken, such as fuses, etc. 2.gnd potential bring the gnd terminal potential to the mini mum potential in any op erating condition. 3.thermal design consider allowable loss (pd) under actual working condition and carry out thermal design with sufficient margin provided. 4.terminal-to-terminal short-circuit and erroneous mounting when the present ic is mounted to a printed circuit board, take utmost care to direction of ic and displacement. in the event that the ic is mounted erroneously, ic may be destroyed. in the event of short-circuit caused by foreign matter that enters in a clearance between outputs or out put and power-gnd, the ic may be destroyed. 5.operation in strong electromagnetic field the use of the present ic in the strong electromagnetic field may result in malo peration, to which care must be taken. 6.built-in thermal shutdown protection circuit the present ic incorporates a thermal shutdown protection circuit (tsd circuit). the working temperature is 175c (standard value) and has a -15c (standard value) hysteresis width. when the ic chip temperature rises and the tsd circuit operates, the output terminal is br ought to the off state. the built-in t hermal shutdown protection circuit (tsd circuit) is first and foremost intended for interrupt ic from thermal runaway, and is not intended to protect and warrant the ic. consequently, never attempt to continuously use the ic afte r this circuit is activated or to use the circuit with the activation of the circuit premised. 7.capacitor across output and gnd in the event a large capacitor is connected across output and gnd, when vcc and vin are short-circuited with 0v or gnd for some kind of reasons, current charged in the capacitor fl ows into the output and may destroy the ic. use a capacitor smaller than 1000 f between output and gnd. 8.inspection by set substrate in the event a capacitor is connected to a pin with low impedanc e at the time of inspection with a set substrate, there is a fear of applying stress to the ic. therefore, be sure to discharge electricity for every process. as electrostatic measures, provide grounding in the assembly process, and take utmost care in transportati on and storage. furthermore, when the set substrate is connected to a jig in the inspection process, be sure to turn off power supply to connect the jig and be sure to turn off power supply to remove the jig. 9.ic terminal input the present ic is a monolithic ic and has a p substrate and p + isolation between elements. with this p layer and n layer of each element, pn junc tion is formed, and when the potential relation is ? gnd>terminal a>terminal b, pn junction works as a diode, and ? terminal b>gnd terminal a, pn junction operates as a parasitic transistor. the parasitic element is inevitably formed because of the ic construction. the operation of the parasitic element gives rise to mutual interference between circuits and results in malfunction, and eventually, breakdown. consequently, take utmost care not to use the ic to operate the parasitic elem ent such as applying voltage lower than gnd (p substrate) to the input terminal. pin a p+ p+ n n n p p substrate gnd gnd n p n c b e gnd p+ p+ n n resistor npn transistor structure (npn) pin b parasitic diode gnd pin a c e b gnd nearby other device pin b parasitic diode parasitic diode parasitic diode p substrate
bd4153fv,BD4153EFV technical note 15/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. 10. gnd wiring pattern if there are a small signal gnd and a high current gnd, it is recommended to sepa rate the patterns for the high current gnd and the small signal gnd and provide a proper grounding to the reference point of the set not to affect the voltage at the small signal gnd with the change in voltage due to resist ance component of pattern wiring and high current. also for gnd wiring pattern of component externally connected, pa y special attention not to cause undesirable change to it. 11. electrical characteristics the electrical characteristics in the s pecifications may vary depending on ambient temperature, power supply voltage, circuit(s) externally applied, and/or other conditions. it is therefore requested to carefully check them including transient characteristics. 12. capacitors to be applied to the input terminals the capacitors to be applied to the input terminals (vcc, v3_in, v3aux_in and v15_in) are used to lower the output impedance of the power supply to be connected. an increase in the output impedance of the power supply may result in destabilization of input voltages (vcc, v3_in, v3aux_in and v15_in). it is recommended to use a low esr capacitor with less temperature coefficient (change in capacitance vs. change in temperature), 0.1 f more or less for vcc and v3aux_in while 1 f more or less for v3_in and v15_in, but it must be thoroughly checked at t he temperature and with the load of the range expected to use bec ause it significantly depends on the char acteristics of the input power supply to be used and the conductor pattern of the pc board. 13. capacitors to be applied to the output terminals to the output terminals (v3, v3_aux, and v15), the output capacitors should be connected between the respective output terminal and gnd. it is recommended to use a low esr capacitor with less temperature coefficient, 1 f more or less for v3 and v15 terminals while 1 f more or less for v3_aux, but it must be t horoughly checked at the temperature and with the load of the range expected to use because it signifi cantly depends on the temper ature and the load conditions. 14. not of a radiation-resistant design. 15. . allowable loss pd with respect to the allowable loss, the thermal derating char acteristics are shown in the exhibit, which we hope would be used as a good-rule-of-thumb. should the ic be used in such a manner to exceed the allo wable loss, reduction of current capacity due to chip temperature rise, and other degraded proper ties inherent to the ic would result. you are strongly urged to use the ic within the allowable loss. 16. in the event that load containing a large inductance compon ent is connected to the output terminal, and generation of back-emf at the start-up and when output is turned off is assu med, it is requested to in sert a protection diode. 17. operating ranges if it is within the operating ranges, certain circuit func tions and operations are warranted in the working ambient temperature range. with respect to characteristic val ues, it is unable to warrant standard values of electric characteristics but there are no sudden variations in characteristic values within these ranges. 18. we are certain that examples of applied circuit diagrams are recommendable , but you are requested to thoroughly confirm the characteristics before using the ic.in addition, when the ic is used with the extern al circuit changed, decide the ic with sufficient margin providedwhile consideration is being given not only to static charac teristics but also variations of external parts and our ic including transient 19. wiring to the input terminals (v3 in, v3aux in, and v15 in) and output terminals (v3, v3aux and v15) of built-in fet should be carried out with special care. unnecessarily lo ng and/or thin conductors used in wiring may result in degradation of characteristics includi ng decrease in output voltage. 20. heatsink heatsink is connected to sub, which should be short-circuit ed to gnd. solder the heatsink to a pc board properly, which offers lower thermal resistance. output pin
bd4153fv,BD4153EFV technical note 16/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. power dissipation bd4153fv BD4153EFV mounted on board 70mm70mm1.6mm glass-epoxy pcb j-a=122.0 /w 1.2 0 25 75 100 125 150 50 0.4 0.2 0 [ ] 0.8 1.0 0.6 [w] 100 1.025w power dissipation (pd) 1.4 0.787w without heat sink. j-a=158.7 /w ambient temperature (ta) pcb ? ja=113.6 /w pcb ? ja=43.5 /w pcb ? ja=44.6 /w pcb ? ja=31.3 /w measure th-156 kuwano-denki measure condition rohm standard board pcb size 70mm70mm1.6mmt (pcb with thermal via) pcb ? single-layer substrate substrate surface copper foil area:0mm0mm pcb ? double-layer substrate substrate surface copper foil area:15mm15mm pcb ? double-layer substrate substrate surface copper foil area:70mm70mm pcb ? fourth-layer substrate substrate surface copper foil area:70mm70mm 0 25 50 75 100 125 150 1 2 3 4 5 1.1w 1.7w 2.8w 4.0w [ ] ambient temperature (ta) [w] power dissipation (pd)
bd4153fv,BD4153EFV technical note 17/17 www.rohm.com 2010.04 - rev.b ? 2010 rohm co., ltd. all rights reserved. ordering part number b d 4 1 5 3 f v - e 2 part number part number package fv : ssop-b24 efv : htssop-b24 packaging and forming specification e2: embossed tape and reel (ssop-b24/ htssop-b24) (unit : mm) ssop-b24 0.1 0.15 0.1 1.15 0.1 0.1 1 0.65 7.8 0.2 (max 8.15 include burr) 7.6 0.3 5.6 0.2 24 0.3min. 12 13 0.22 0.1 ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin (unit : mm) htssop-b24 0.65 1.0max 0.850.05 0.080.05 0.24 +0.05 - 0.04 0.08 m s 0.08 1.00.2 0.530.15 0.17 +0.05 - 0.03 4 + 6 ? 4 s 24 13 112 0.325 (3.4) (5.0) 7.80.1 7.60.2 5.60.1 (max 8.15 include burr) 1pin mark ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape (with dry pack) tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2000pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

▲Up To Search▲

Price & Availability of BD4153EFV

	To Download BD4153EFV Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .